The P89V51RD2 is 80C51 microcontrollers with 64 kB ﬂash and 1024 B of data RAM.
A key feature of the P89V51RD2 is its X2 mode option. The design engineer can choose to run the application with the conventional 80C51 clock rate (12 clocks per machine cycle) or select the X2 mode (six clocks per machine cycle) to achieve twice the throughput at the same clock frequency. Another way to beneﬁt from this feature is to keep the same performance by reducing the clock frequency by half, thus dramatically reducing the EMI.
The ﬂash program memory supports both parallel programming and in serial ISP. Parallel programming mode offers gang-programming at high speed, reducing programming costs and time to market. ISP allows a device to be reprogrammed in the end product under software control. The capability to ﬁeld/update the application ﬁrmware makes a wide range of applications possible.
- 80C51 CPU
- 5 V operating voltage from 0 MHz to 40 MHz
- 64 kB of on-chip ﬂash user code memory with ISP and IAP
- Supports 12-clock (default) or 6-clock mode selection via software or ISP
- SPI and enhanced UART
- PCA with PWM and capture/compare functions
- Four 8-bit I/O ports with three high-current port 1 pins (16 mA each)
- Three 16-bit timers/counters
- Programmable watchdog timer
- Eight interrupt sources with four priority levels
- Second DPTR register
- Low EMI mode (ALE inhibit)
- TTL- and CMOS-compatible logic levels
- Brownout detection
- Low power modes
- Power-down mode with external interrupt wake-up
- Idle mode