The MYC-Y7Z010/007S CPU Module is an industrial-grade System-on-Module (SoM) based on Xilinx Zynq-7000 family SoC available for either the XC7Z010 or XC7Z007S version. It has integrated the Zynq-7010 or Zynq-7007S device, 512MB DDR3 SDRAM, 4GB eMMC, 16MB quad SPI Flash, a Gigabit Ethernet PHY and external watchdog on board and provides 1.27mm 180-pin stamp-hole (Castellated-Hole) expansion interface to allow a large number of I/O signals for ARM peripherals and FPGA I/Os to be extended to your base board. The module is ready to run Linux and supports wide working temperature ranging from -40 to +85 Celsius which is ideal for industrial embedded applications.
MYC-Y7Z010/007S CPU Module
MYIR provides a development board MYD-Y7Z010/007S for evaluating the MYC-Y7Z010/007S CPU Module, which employs the MYC-Y7Z010/007S as the controller board by populating the CPU Module on its base board through 1.27mm pitch 180-pin stamp-hole (Castellated-Hole) interface. The base board has extended a rich set of peripheral interfaces including serial ports, USB Host port, three Gigabit Ethernet ports, CAN, TF card slot, JTAG, etc. One 2.54mm pitch 2 x 25-pin expansion headeris on the base board to let more GPIOs available for further extension. MYIR offers an optional MYD-7Z010/007S IO CAPE to connect to this expansion header to extend many peripherals and signals like HDMI, LCD, camera and Pmod to help user explore more functions. The 7-inch LCD Module with capacitive touch screen as well as MY-CAM011B camera module from MYIR can be supported through the IO Cape.
MYD-Y7Z010/007S Development Board
MYD-Y7Z010/007S Board in the Video
Xilinx XC7Z010-1CLG400I (Zynq-7010) or XC7Z007S-1CLG400I (Zynq-7007S) ARM® Cortex™-A9 MPCore processo
- 667MHz dual-core processor (up to 866MHz, for XC7Z010)
- 667MHz single-core processor (up to 766MHz, for XC7Z007S)
- Integrated Artix-7 class FPGA subsystem
with 28K logic cells, 17,600 LUTs, 80 DSP slices (for XC7Z010)
with 23K logic cells, 14,400 LUTs, 66DSP slices (for XC7Z007S)
- NEON™ & Single / Double Precision Floating Point for each processor
- Supports a Variety of Static and Dynamic Memory Interfaces
Peripherals and Signals Routed to Pins