The Arria II GX Video Development System is an ideal video processing platform for high-end video applications. Terasic recognized for its strong design expertise in high-end video, imaging and multimedia products have made available a video development package that targets video processing development using an Arria II GX device. The package includes an Arria II GX FPGA development kit (DK-DEV-2AGX125N) featuring an EP2AGX FPGA device with HSMC connectors to allow additional functionality and connectivity via HSMC daughter boards. The Arria II GX FPGA development kit delivers a complete PCI Express-based development platform. This interface uses the Arria II GX device’s PCI Express hard IP to accelerate development time for high-volume PCI Express applications including add-in cards, host bus adapters, graphics cards, and high-end servers. Furthermore, the board includes an abundant amount of memory including on-board DDR3 device and DDR2 SODIMM, creating a complete integrated memory interface solution for memory-intensive applications.

The DVI-HSMC daughter card part of the bundled package will allow developers to access high quality and high resolution video signals that can support resolution up to 1600x1200. A complete DVI video controller design with source code is provided.

The development can also allow users to experience advanced image processing designs incorporating VIP (Altera’s Video and Image Processing Suite MegaCore Functions).

Arria II GX EP2AGX125EF35 FPGA

• 124,100 logic elements (LEs)
• 49,640 adaptive logic modules (ALMs)
• 8,121 Kb on-chip memory
• 12 high-speed transceivers
• 6 phase-locked loops (PLLs)
• 576 18x18 multipliers
• 0.9V core power

On-board ports

• One HSMC expansion port
• One gigabit Ethernet port

PCI Express x8 Edge Connector

• Support connection speed of Gen1 at 2.5Gbps/lane
• Connection established with PC motherboard with x8 PCI Express slot
• 128MB 16bit DDR3 device
• 1GB 64bit DDR2 SO-DIMM
• 2MB SSRAM
• 64MB FLASH
• MAX II CPLD and flash fast passive parallel configuration
• On-board USB-Blaster™ circuitry using the Quartus II Programmer
• Four on-board oscillators
  • 100MHz
  • Programmable oscillator, default frequency 125MHz
  • Programmable oscillator, default frequency 100MHz
  • 155.52MHz
• SMA connectors for external LVPECL clock input
• SMA connector for clock output

Arria II GX FPGA Development Kit CD-ROM

• Design examples
  • Board Update Portal, featuring the Nios® II processor web server and remote system update
  • Board test system

Altera's Complete Design Suite DVD

• Quartus II Software Development Kit Edition, includes support for Arria II GX FPGAs
• Nios II Embedded Design Suite
• MegaCore® IP Library includes PCI Express, Triple Speed Ethernet, SDI, and DDR3 High-Performance Controller IP cores
  • IP evaluation available through OpenCore Plus